Prof. Dr. Sreenivasappa Veeranna serves as Professor of Electronics and Communication Engineering at Presidency University, Bangalore, where he specializes in power electronics, inverter control, and renewable energy systems. He holds a Ph.D. in Electrical Engineering from the National Institute of Technology Karnataka, Surathkal. With over nineteen years of academic and research experience, he has played a pivotal role in developing advanced converter topologies, PWM algorithms, and efficient electric vehicle charging systems. His Scopus-indexed publications exceed 26 papers with more than 118 citations and an h-index of 6, showcasing his scholarly influence. A recipient of research fellowships from India’s Ministry of Human Resource Development and The Petroleum Institute, Abu Dhabi, Dr. Veeranna is also an innovator with five Indian patents related to smart control and power optimization technologies. His research contributions have significantly advanced the efficiency and reliability of electrical power systems. Dedicated to both research and mentorship, he has guided multiple doctoral scholars and continues to lead projects in renewable energy integration and intelligent control. Through his consistent contributions to power converter design and inverter optimization, Dr. Veeranna has established himself as a leading researcher and an inspiring academic figure, making him a deserving candidate for the Best Researcher Award.
Featured Publications
Veeranna, S. B., Yaragatti, U. R., & Beig, A. R. (2012). Space vector-based synchronised bus-clamping pulse width modulation algorithms for three-level voltage source inverter in overmodulation region. IET Power Electronics, 5(4), 493–500. Citations: 24
Veeranna, S. B., Yaragatti, U. R., & Beig, A. R. (2010). Synchronized SVPWM algorithm for overmodulation region for three-level VSI. In Proceedings of the 36th Annual Conference of the IEEE Industrial Electronics Society (IECON 2010) (pp. 1004–1010). IEEE. Citations: 23
Sreenivasappa, B. V., & Yaragatti, U. R. (2009). Design and implementation of FPGA-based low power digital PID controllers. In Proceedings of the 2009 International Conference on Industrial and Information Systems (ICIIS) (pp. 568–573). IEEE. Citations: 21
Sreenivasappa, B. V., & Yaragatti, U. R. (2010). Analysis and implementation of discrete-time PID controllers using FPGA. International Journal of Electrical and Computer Engineering, 2(1), 71–82. Citations: 18
Veeranna, S. B., Beig, A. R., & Yaragatti, U. R. (2011). Performance analysis of PWM strategies for cascaded H-bridge three-level inverter. In Proceedings of the 2011 IEEE GCC Conference and Exhibition (GCC) (pp. 81–84). IEEE. Citations: 13